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E2D0011-27-43 Semiconductor
Semiconductor MSM6585
ADPCM Voice Synthesis IC
This version: Jan. 1998 MSM6585 Previous version: May. 1997
GENERAL DESCRIPTION
The MSM6585 is an version-up product of the MSM5205 voice synthesis IC. Mainly improved points are improvement for the precision of an internal DA converter, a built-in low-pass filter, and expansion on the sampling frequency. The MSM6585 does not include a control circuit to drive an external memory similar to the MSM5205. Therefore, the MSM6585 can be connected with not only semiconductor memories, but other memory media (CD-ROM, etc.) by the control of CPU.
FEATURES
* 4-bit ADPCM method * Built-in 12-bit DA converter * Built-in low-pass filter (LPF) (-40dB/oct) * Sampling frequencies: 4k/8k/16k/32kHz * Master clock frequency (ceramic oscillator) : 640kHz * Voice data synthesis : Supported by voice analysis editing tools AR76-202 and AR203 * Package options : 18-pin plastic DIP (DIP18-P-300-2.54) (Product name : MSM6585RS) 24-pin plastic SOP (SOP24-P-430-1.27-K) (Product name : MSM6585 GS-K) 30-pin plastic SSOP (SSOP30-P-56-0.65-K) (Product name : MSM6585 GS-AK)
DIFFERENCES BETWEEN MSM6585 AND MSM5205
MSM6585 640kHz 4k/8k/16k/32kHz 4-bit 12-bit Included (-40dB/oct) Included 4.5 to 5.5V 10mA -40 to +85C MSM5205 384kHz 4k/6k/8kHz 3-bit/4-bit 10-bit Not included Not included 3.0 to 6.0V 4mA -30 to +70C
* Master clock frequency: * Sampling frequency: * ADPCM bit length: * DA Converter: * Low-pass filter: * Overflow preventing circuit: * Power supply voltage: * Operating current consumption: * Operating temperature: * D3 to D0 input timing
VCK (O) D3 - D0 input timing ADPCM Data
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Semiconductor
MSM6585
BLOCK DIAGRAM
VDD GND
D3 D2 D1 D0
4-Bit LATCH
4
ADPCM Synthesizer
12
12-Bit DAC
LPF
- +
AOUT DAO
OSC
Timing Controller
TEST CIRCUIT
XT
XT
S1 S2
RESET
VCK
T1
T2
T3
T4
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Semiconductor
MSM6585
PIN CONFIGURATION (TOP VIEW)
S1 1 S2 2 T3 3 D0 4 D1 5 D2 6 D3 7 T4 8 GND 9
18-Pin Plastic DIP

S1 S2 T3 1 2 3 4 5 6 7 8 9
24 23 22 21 20 19 18 17 16 15 14 13
VDD XT XT NC RESET NC VCK T2 T1 NC DAO AOUT
18 VDD 17 XT 16 XT
NC D0 D1 D2 D3 T4 NC
15 RESET 14 VCK 13 T2 12 T1
NC
10 11
11 DAO
10 AOUT
GND 12
NC : No connection
24-Pin Plastic SOP
S1 S2
1 2 3 4 5 6 7 8 9
30 29 28 27 26 25 24 23 22 21 20 19
VDD
XT NC NC NC XT RESET VCK T2 T1 NC NC NC DAO AOUT
NC NC NC T3 D0 D1 D2
D3 10 NC 11 NC 12
NC 13 T4 14
18 17 16
GND 15
NC : No connection
30-Pin Plastic SSOP
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Semiconductor
MSM6585
PIN DESCRIPTION
Pin DIP SOP SSOP 1 2 3 4-7 8 9 10 11 12 13 14 1 2 3 5, 7, 8, 10 11 12 13 14 16 17 18 1 2 6 7-10 14 15 16 17 21 22 23 Symbol S1 I S2 T3 D0-D3 T4 GND AOUT DAO T1 T2 VCK I I O -- O O I Type Description Pins to determine the sampling frequency. The sampling frequencies of 32k, 16k, 8k, and 4kHz can be selected by combinations. (See the sampling frequencies in FUNCTIONAL DESCRIPTION on the selection of combinations.) Pin to test the internal circuit. Set this pin to a high level or make it open because it has a built-in pull-up resistor. Input pins for ADPCM data. Pin to test the internal circuit. Make this pin open. Pin to test the internal circuit. Make this pin open. Ground pin Pin to output the analog voice from the low-pass filter. Connect a 0.01 mF capacitor to this pin. (See the AOUT connecting circuit in FUNCTIONAL DESCRIPTION on the connecting circuit.) Pin to output the analog voice from the DA converter. Pins to test the internal circuit. Set these pins to a low level or make them open because pull-down resistors are included. This pin outputs the sampling frequency selected by the combinations of O S1 and S2. The voice synthesis starts or stops by synchronizing with VCK. Reset pin. The voice synthesis circuit is initialized by synchronizing with 15 20 24 RESET I VCK. If this pin is set to a high level, the D0 to D3 data inputs are disabled by synchronizing with VCK. The AOUT and DA0 pins output 1/2 VDD and become the state of no voice. 16 17 18 22 23 24 25 29 30 XT XT VDD I O -- Pin to connect an oscillator. When the external clock is used, input it from this pin. Pin to connect an oscillator. When the external clock is used, make this pin open. Power supply pin. Insert a bypass capacitor of 0.1 mF or more between this pin and the GND pin.
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Semiconductor
MSM6585
ABSOLUTE MAXIMUM RATINGS
(GND=0 V) Parameter Power Supply Voltage Input Voltage Storage Temperature Symbol VDD VIN TSTG Condition Ta = 25C Ta = 25C -- Rating -0.3 to +7.0 -0.3 to VDD+0.3 -55 to +150 Unit V V C
RECOMMENDED OPERATING CONDITIONS
(GND = 0V) Parameter Power Supply Voltage Operating Temperature Master Clock Frequency Symbol VDD Top fOSC Condition -- -- oscillator connection Range 4.5 to 5.5 -40 to +85 640 Unit V C kHz
ELECTRICAL CHARACTERISTICS
DC Characteristics
(VDD=4.5 to 5.5V, GND=0V, Ta=-40 to +85C) Parameter "H" Input Voltage "L" Input Voltage "H" Output Voltage "L" Output Voltage "H" Input Current "H" Input Current "H" Input Current "L" Input Current "L" Input Current "L" Input Current Current Consumption DA Output Relative Error DA Output Impedance LPF Load Resistance
Symbol
Condition -- -- VCK: IOH = -40mA VCK: IOL = 40mA T1, T2, RESET: VIH = VDD S1, S2, D0 - D3, T3: VIH = VDD XT: VIH = VDD T3: VIL = 0V S1, S2, D0 - D3, T1, T2, RESET: VIL=0V XT=VIL=0V fosc=640kHz, No load No load -- --
Min. 0.8VDD -0.1 VDD-0.4 -- 20 -- -- -400 -10 -20 -- -- 10 50
Typ. -- -- -- -- 150 -- -- -120 -- -- 5 -- -- --
Max. VDD+0.1 0.2VDD -- 0.4 400 10 20 -20 -- -- 10 40 40 --
Unit V V V V mA mA mA mA mA mA mA mV kW kW
VIH VIL VOH VOL IIH1 IIH2 IIH3 IIL1 IIL2 IIL3 IDD | VDAE | RDAO RAOUT
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Semiconductor AC Characteristics
Parameter Original Oscillation Duty Cycle RESET Input Pulse Width Data Setup Time Data Hold Time Symbol fduty tW(RST) tS tH Condition -- fSAM = 4kHz ... = 8kHz ... =16kHz ... =32kHz ... tVCK = 250ms = 125ms = 62.5ms =31.25ms Min. 40 2tVCK -- tVCK/2 Typ. 50 -- -- --
MSM6585
Max. Unit 60 -- 3 -- % ms ms ms
When data is shared with the MSM5205, note that the D3 to D0 selection timings of the MSM6585 and MSM5205 are different. (Refer to DIFFERENCES BETWEEN MSM6585 AND MSM5205.)
TIMING DIAGRAM
VCK (O)
tVCK
RESET (I)
tW(RST)
D3 - D0 (I)
tH
ADPCM1 ADPCM2 ADPCMN
ADPCM N+1
tS
IC internalD3 - D0 selection timings AOUT, DAO (O)
tVCK/8
The VCK clock rising and falling edges are reversed between the MSM5205 and the MSM6588, as indicated in DIFFERENCES BETWEEN MSM6585 AND MSM5205. Note that the MSM6585 cannot accept data if the MSM5205 controls to repeat valid and invalid each half cycle, when the MSM5205 is replaced with the MSM6585.
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Semiconductor
MSM6585
FUNCTIONAL DESCRIPTION
1. Sampling Frequency The relationship of the sampling frequencies on S1 and S2, and the cutoff frequencies are listed below.
S1 L H L H S2 L L H H Sampling frequency (fSAM) 4 kHz 8 kHz 16 kHz 32 kHz Cutoff frequency (fCUT) 1.6 kHz 3.2 kHz 6.4 kHz 12.8 kHz
2.
AOUT Connecting Circuit Connect a 0.01mF capacitor to the AOUT pin. The circuit diagram is as shown below.
MSM6585 AOUT 0.01mF Amplifier Speaker
Even when the DAO pin is used, connect a 0.01mF capacitor to the AOUT pin. This capacitor is used for the improvement of a voice quality. 3. Voice Output
The MSM6585 has two voice output pins. The DAO is direct output pin from the internal DA converter. The AOUT is a pin to output a voice after which the DAO output passed a built-in LPF. 3.1 DA Converter Output Waveform
The output amplitude from the DA converter is max. (4095/4096) VDD and becomes a stair step waveform synchronized with the sampling frequency. The DAO output impedance varies in the ranges from 10kW to 40kW. Therefore, determine the filter constant so that the resistor variation does not have influence on the cutoff frequency of the filter.
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Semiconductor 3.2 Low-pass Filter Output
MSM6585
The cutoff frequency of the low-pass filter varies in proportion to the sampling frequency. The following figure shows the low-pass filter characteristics in the sampling frequency 8kHz.
0
Damping factor (dB)
-20
-40
-60
100
1k Frequency (Hz)
10k
4.
Oscillation Following show external circuit diagrams using a ceramic resonator, KBR-640B made by Kyocera Corp. and CSB640P made by Murata MFG. Co., Ltd.
KBR-640B used
CSB640P used
MSM6585 XT XT XT
MSM6585 XT 1MW
640kHz
640kHz
220pF
220pF
100pF
100pF
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Semiconductor
MSM6585
APPLICATION CIRCUITS
Centronics Interface Circuit (sampling frequency : 8kHz)
+5V 4 BUSY STROBE RESET 1 6 3 5 8 7 12 9 13 14 0.1mF 10 MSM4013 2 11 0.1mF S1 RESET VCK MSM6585 T4 T1 S2 ADPCM DECODER DAO XT XT 640kHz T3 VDD AOUT AMP 0.01mF
D0 D1 D2 D3 D4 D5 D6 D7
7 5 3 1 6 4 2 15
9
14
GND T2 D3 D2
D1 D0
MSM4019 13 12 11 10
8
16 0.1mF
Centronics Timing Chart
RESET RES DATA STROBE
125msec
MIN250msec
First byte
VCK KA KB BUSY
High nibble Low nibble
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Semiconductor Example of Interface Circuit with 256K-bit EPROM
MSM6585
The circuit example and timing diagram that used the 256K-bit EPROM are shown below.
MSM27256
A0 ~ A10 A11 A12 A13 A14
CE O0 O4 O1 O5 O2 O6 O3 O7
11
O0 ~ O11 RESET
O12 CL
MSM4013
B1 A1 B2 A2 B3 A3 B4 A4 KB MSM4019 D2 D3 D4 KA D1 640kHz
Q2 D2 Q2 MSM4013 CL1 R1D1 S2 Q1 R2 CL2 S1
D0 VCK
D1
D2
D3
XT
MSM6585
AOUT XT
RESET S2 S1
0.01mF 100kW
START SW
CL RESET
Q1
Q2 Q3 Q4
MSM4040
10kW 0.1mF 100kW
(MSM4025)
M6585 VCK (O) START SW M4013 S1 M4013 Q1 (M6585 RESET) M4013 Q2 (Lower 4-bit) Q2 (Upper 4-bit) M4040 Q1 Q2 Q12 M4040 Q3 Q4
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Semiconductor
MSM6585
PAD CONFIGURATION
Pad Layout Product name Function Die size Die thickness Pad size Substrate voltage MSM6585 ADPCM voice synthesis IC = 2.92 mm, Y = 3.58 mm 350 m 30 m 130 m 130 m GND
Y 12 13 8 7
X
16 3 17 20 1 2
Pad Coordiantes (The die center is located at X=0, Y=0)
(Unit: mm) PAD No. 1 2 3 4 5 6 7 8 9 10 PAD Name S1 S2 T3 D0 D1 D2 D3 T4 AVSS VSS X-axis 377 819 1305 1305 1305 1305 1305 830 447 267 Y-axis -1635 -1635 -1635 -943 44 1095 1635 1635 1580 1580 PAD No. 11 12 13 14 15 16 17 18 19 20 PAD Name AOUT DAO T1 T2 VCK RESET XT XT VDD AVDD X-axis 38 -1125 -1305 -1305 -1305 -1305 -1281 -529 -299 -119 Y-axis 1635 1635 1579 1009 -88 -818 -1635 -1635 -1549 -1549
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Semiconductor
MSM6585
PACKAGE DIMENSIONS
(Unit : mm)
DIP18-P-300-2.54
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 1.30 TYP.
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Semiconductor
MSM6585
(Unit : mm)
SOP24-P-430-1.27-K
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 0.58 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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Semiconductor
MSM6585
(Unit : mm)
SSOP30-P-56-0.65-K
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 0.19 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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